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NASA NTRS · Conference Paper

Frequency Dependence of Single-event Upset in Advanced Commerical PowerPC Microprocessors

Published 2019-07-12 From Jet Propulsion Laboratory 4 authors
View on NASA NTRS ↗

Attribution

This is the abstract and citation. Full text lives at NASA NTRS — we link out rather than host. All credit to the authors and Jet Propulsion Laboratory.

Abstract

Verbatim from NASA NTRS. Not paraphrased, not summarized.

This paper examines single-event upsets in advanced commercial SOI microprocessors in a dynamic mode, studying SEU sensitivity of General Purpose Registers (GPRs) with clock frequency. Results are presented for SOI processors with feature sizes of 0.18 microns and two different core voltages. Single-event upset from heavy ions is measured for advanced commercial microprocessors in a dynamic mode with clock frequency up to 1GHz. Frequency and core voltage dependence of single-event upsets in registers is discussed.

Authors

  • Irom, Frokh Jet Propulsion Lab., California Inst. of Tech.
  • Farmanesh, Farhad F. Jet Propulsion Lab., California Inst. of Tech.
  • Swift, Gary M. Jet Propulsion Lab., California Inst. of Tech.
  • Johnston, Allen H. Jet Propulsion Lab., California Inst. of Tech.

Keywords

  • single-event upset (SEU)
  • microprocessors
  • radiation testing

Citation: Irom, Frokh, Farmanesh, Farhad F., Swift, Gary M. , et al. (2019). Frequency Dependence of Single-event Upset in Advanced Commerical PowerPC Microprocessors. Jet Propulsion Laboratory. NASA NTRS ID 20070023697. https://ntrs.nasa.gov/citations/20070023697 ↗