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NASA NTRS · Preprint (Draft being sent to journal)

Frequency Dependence of Single-Event Upset in Highly Advanced PowerPC Microprocessors

Published 2019-07-12 From Jet Propulsion Laboratory 4 authors

Attribution

This is the abstract and citation. Full text lives at NASA NTRS — we link out rather than host. All credit to the authors and Jet Propulsion Laboratory.

Abstract

Verbatim from NASA NTRS. Not paraphrased, not summarized.

Single-event upset effects from heavy ions were measured for Motorola silicon-on-insulator (SOI) microprocessor with 90 nm feature sizes at three frequencies of 500, 1066 and 1600 MHz. Frequency dependence of single-event upsets is discussed. The results of our studies suggest the single-event upset in registers and D-Cache tend to increase with frequency. This might have important implications for the overall single-event upset trend as technology moves toward higher frequencies.

Authors

  • Irom, Farokh Jet Propulsion Lab., California Inst. of Tech.
  • Farmanesh, Farhad Jet Propulsion Lab., California Inst. of Tech.
  • White, Mark Jet Propulsion Lab., California Inst. of Tech.
  • Kouba, Coy K. NASA Johnson Space Center

Keywords

  • Cyclotron
  • heavy ions
  • silicon on insulators
  • microprocessors
  • single event effects
  • single event transient,
  • single event upset

Citation: Irom, Farokh, Farmanesh, Farhad, White, Mark , et al. (2019). Frequency Dependence of Single-Event Upset in Highly Advanced PowerPC Microprocessors. Jet Propulsion Laboratory. NASA NTRS ID 20070032858. https://ntrs.nasa.gov/citations/20070032858 ↗